Field effect transistors (FETs) with insulated gates are in great use in the industry because of the low power consumed in the OFF state and because of the ease of manufacturing these devices in integrated circuits. However, as the size of the devices, and especially the gates, decreases to reduce the size of the device (to improve density) and to increase frequency response, the characteristics of the devices are harder to maintain. Specifically, as the gate insulating layer is reduced in size, leakage current increases, breakdown voltage decreases, and/or the ON resistance increases.
Thus, it would be highly advantageous to provide FETs that overcome these problems.
It is a purpose of the present invention to provide a new method of manufacturing enhanced dielectric constant dielectric material for FET gates.
It is another purpose of the present invention to provide a new method of fabricating dielectric material with lateral strain that increases the dielectric constant.
It is still another purpose of the present invention to provide a new method of fabricating a high dielectric constant (CaSr)TiO.sub.3 on a silicon substrate in a FET gate.
It is a further purpose of the present invention to provide a new and improved enhanced dielectric constant dielectric material in a FET gate.
It is still a further purpose of the present invention to provide a new and improved high dielectric constant (CaSr)TiO.sub.3 epitaxially grown on a silicon substrate in a FET gate.